Lab 2 Tutorial: Inverter Schematic and Simulation

Overview

This tutorial introduces the Cadence Virtuoso custom IC design environment. You will create a CMOS inverter schematic, generate a reusable symbol, build a testbench, export an HSPICE netlist, run a transient simulation, and inspect the results in Synopsys WaveView.

1. Setting up Your Account Environment

Use the ECE teaching server Endeavour (endeavour.ece.iit.edu), which runs Rocky Linux.

Open a terminal

1. Click Activities in the upper-left corner of the Rocky Linux desktop.
2. Open Terminal from the applications menu or search for “Terminal.”
3. Confirm that the prompt shows your Endeavour account.

Create the ECE 429 working directory and load the environment

Create one working directory in your home directory and enter it:

mkdir ~/ece429
cd ~/ece429

Load the course environment:

source /import/scripts/ece429.cshrc

After the setup completes, files such as cds.lib and lib.defs should be present in the working directory.

2. Inverter Schematic Using Virtuoso

2.1 Start Virtuoso

From ~/ece429, launch Virtuoso:

virtuoso

Virtuoso Studio and the Library Manager should open. Verify that the FreePDK45 libraries are visible, including NCSU_Devices_FreePDK45 and NCSU_TechLib_FreePDK45.

2.2 Create your design library

1. In Library Manager, choose File → New → Library.
2. Set the library name to my429. Keep the directory in your current ECE 429 working directory, then click OK.
3. In Technology File for New Library, choose Attach to an existing technology library and click OK.
4. Select NCSU_TechLib_FreePDK45 and click OK.

2.3 Create the inverter schematic

In Library Manager, select my429 and choose File → New → Cell View. Create a cell named lab02 with view schematic.

Add PMOS and NMOS devices

1. Press i to open Add Instance. Select library NCSU_Devices_FreePDK45, cell PMOS_VTL, view symbol, and place the PMOS.
2. Select the PMOS and press q. Change Width from 90 nm to 180 nm, then click Apply and OK.
3. Press i again and place an NMOS_VTL below the PMOS. Keep the NMOS width at 90 nm.

Add input and output pins

1. Choose Create → Pin. Name the input pin in and leave Direction = input. Place it to the left of the transistors.
2. Choose Create → Pin again. Name the output pin out, set Direction = output, and place it to the right.

Add power symbols and wire the inverter

1. Press i, switch the library to analogLib, add vdd above the PMOS, and add gnd below the NMOS.
2. Press w to wire the circuit. Connect both gates to in, join the drains to out, connect the PMOS source/body to vdd, and connect the NMOS source/body to gnd.
3. Press Esc when wiring is complete.

Run Check and Save. Continue only when there are no schematic errors.

2.4 Create the inverter symbol

1. With the checked schematic open, choose Create → Cellview → From Cellview.
2. Verify the first dialog and click OK.
3. In Symbol Generation Options, verify that in is under Left Pins and out is under Right Pins. Keep the other defaults and click OK.
4. In the Symbol Editor, run Check and Save.

The my429 library should now contain both schematic and symbol views for lab02.

3. Inverter Simulation Using HSPICE

3.1 Create the testing circuit

Close the inverter schematic and symbol editors. In Library Manager, choose File → New → Cell View and create lab02_testing in library my429 with view schematic.

1. Press i. Select library my429, cell lab02, view symbol, and place the inverter.
2. From analogLib, add vdd, gnd, one vdc, one vpulse, and one cap.
3. Press w and wire the circuit as shown. Press Esc to exit wiring.

Set source and load values

Select each component and press q (or use Edit → Properties → Objects).

Name the input and output nets

Choose Create → Wire Name. Label the inverter input wire input and the inverter output wire output. Then run Check and Save.

3.2 Configure ADE Explorer and export the HSPICE netlist

1. With lab02_testing open, choose Launch → ADE Explorer. Select Create New View and click OK.
2. Choose Setup → Simulator/Directory/Host, select hspiceD, and click OK.
3. Choose Setup → Model Libraries and add:
   /apps/FreePDK45/ncsu_basekit/models/hspice/hspice_nom.include
   Click Apply, then OK.
4. Choose Analyses → Choose. Select tran and set Start = 0, Stop = 200p, Step = 1p. Ensure Enabled is checked.
5. Choose Simulation → Netlist → Create.
6. In the generated netlist window, choose File → Save As and save the file as lab02.sp in ~/ece429.

3.3 Run HSPICE

In ~/ece429, verify that the netlist exists:

ls

Open the netlist in your preferred text editor. For example:

gedit lab02.sp

In the .OPTION section, add + POST immediately after + PSF=2:

.OPTION
+    ...
+    PSF=2
+    POST
+    ...

Run HSPICE:

hspice lab02.sp | tee lab02.hspice.output

This displays the simulation log in the terminal and saves a copy to lab02.hspice.output.

4. View Waveforms and Measure Propagation Delay

4.1 Open the waveform in Synopsys WaveView

Launch WaveView from the terminal:

wv

1. Choose Open Waveform, browse to ~/ece429, select lab02.tr0, and click OK.
2. Double-click D0:lab02.tr0 in the waveform browser, then open toplevel.
3. From the signal list, select v(input) and v(output) and drag them into the waveform display. You may use Ctrl to select multiple signals.

4.2 Measure propagation delay

Open Measurement Tool and choose Delay under Time Domain. Use v(output) as Signal and v(input) as Ref. Signal. Set both measurement levels to 50%. For a 0–1.1 V logic swing, the 50% crossing is 0.55 V. If WaveView requests explicit top/baseline levels, use 1.1 V and 0 V.

Click Apply for each configuration.

Average propagation delay

For the example waveform:

Show delay results across the waveform

Right-click a displayed delay annotation and choose Measure Results. In the Measure Results window, enable the Show check box for the delay results you want displayed.

5. Useful Virtuoso Schematic Hotkeys

Virtuoso also displays mouse-button actions and command hints in the status area at the bottom of the editor.